SAA7128H

Product Summary

The SAA7128H is a digital video encoder. Simultaneously, RGB or bypassed but interpolated CB-Y-CR signals are available via three additional DACs. The SAA7128H at a 54 MHz multiplexed digital D1 input port accepts two ITU-R BT.656 compatible CB-Y-CR data streams with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG decoded data with overlay and MPEG decoded data without overlay, whereas one data stream is latched at the rising, the other one at the falling clock edge.

Parametrics

SAA7128H absolute maximum ratings: (1)VDDA analog supply voltage: 3.15 to 3.45 V; (2)VDDD digital supply voltage: 3.0 to 3.6 V; (3)IDDA analog supply current: 130 to 150 mA; (4)IDDD digital supply current: 75 to 100 mA; (5)Vi input signal voltage levels TTL compatible Vo(p-p)analog output signal voltages Y, C and CVBS without load (peak-to-peak value): 1.25 to 1.50 V; (6)RL load resistance: 75 - 300 W; (7)LElf(i)low frequency integral linearity error: ±3 LSB; (8)LElf(d)low frequency differential linearity error: ±1 LSB; (9)Tamb ambient temperature: 0 - 70 ℃.

Features

SAA7128H features: (1)Monolithic CMOS 3.3 V device, 5 V I2C-bus optional; (2)Digital PAL/NTSC/SECAM encoder; (3)System pixel frequency 13.5 MHz; (4)54 MHz double-speed multiplexed D1 interface capable of splitting data into two separate channels (encoded and baseband); (5)Three Digital-to-Analog Converters (DACs)for CVBS (CSYNC), VBS (CVBS)and C (CVBS)two times oversampled with 10-bit resolution (signals in brackets optional); (6)Three DACs for RED (CR), GREEN (Y)and BLUE (CB)two times oversampled with 9-bit resolution (signals in brackets optional); (7)Alternatively, an advanced composite sync is available on the CVBS output for RGB display centring; (8)Real-time control of subcarrier; (9)Cross-colour reduction filter; (10)Closed captioning encoding and World Standard Teletext (WST)and North-American Broadcast Text System (NABTS)teletext encoding including sequencer and filter; (11)Copy Generation Management System (CGMS)encoding (CGMS described by standard CPR-1204 of EIAJ); 20 bits in lines 20/283 (NTSC)can be loaded via I2C-bus; (12)Fast I2C-bus control port (400 kHz); (13)Line 23 Wide Screen Signalling (WSS)encoding; (14)Video Programming System (VPS)data encoding in line 16 (50/625 lines counting); (15)Encoder can be master or slave; (16)Programmable horizontal and vertical input synchronization phase; (17)Programmable horizontal sync output phase.

Diagrams